x86/mm: Move p2m type into bits of the PTE that the IOMMU doesn't use.

x86/mm: Move p2m type into bits of the PTE that the IOMMU doesn't use.

AMD IOMMU hardware uses bit 9 - bit 11 to encode lower page levels. p2m
type bits in p2m flags has to be shifted from bit 9 to bit 12.  Also,
bit 52 to bit 60 cannot be non-zero for iommu pde. So, the definition of
p2m_ram_rw has to be swapped with p2m_invalid.

Signed-off-by: Wei Wang <wei.wang2@amd.com>
Acked-by: Tim Deegan <Tim.Deegan@citrix.com>
Committed-by: Tim Deegan <Tim.Deegan@citrix.com>